Re: FPGA for PCI based servo control board

[John Kasunich <jmkasunich-at-worldnet.att.net>]

At 05:21 PM 4/5/03 -0500, Robin Szemeti wrote:

>On Saturday 05 April 2003 22:49, John Kasunich wrote:
>
> > It's better than the parallel port.  With ethernet, you
> > either get good data, or no data.  With the parallel port,
> > you can get bad data.
>
>Really? .. coo. thats handy. I'll take out all these error checks and
>bad-packet counters in the core ethernet routines then ...
>
>Ethernet is likely to be more susceptible to transient errors than parralel,
>because of lower peak-peak voltages, and higher clock speeds
>Slower, wider interfaces are always less likely to suffer data loss
>than fast thin ones, given similar transmission conditions.

In general I agree, though the transformer isolation will help.

But I was not referring to bit errors on the wire.  I was referring
to packets.  Even raw packets have CRC error detection, and a
corrupted packet will be discarded.  So you either get a packet
with a valid CRC and good data, or you get no packet at all.

John Kasunich