Re: FPGA for PCI based servo control board



On Sat, Apr 05, 2003 at 05:21:00PM -0500, Robin Szemeti wrote:
> 
> Ethernet is likely to be more susceptible to transient errors than parralel, 
> because of lower peak-peak voltages, and higher clock speeds (using paralell 
> 8 bits wide you can use nice slow filters and take your time examining the 
> line state to determine whether its high or low, with ethernet running at 
> 10mbs down a twisted pair, short duration interference of the (1us sort of 
> duration) obliterates a whole bit, destroying an entire packet.) Slower, 
> wider interfaces are always less likely to suffer data loss than fast thin 
> ones, given similar transmission conditions.
> 
> Having said that, ethernet does seem to be quite robust, the differential 
> nature of the signals helps a lot here.

10 M ethernet is 2.2v. its differential and terminated.  

I've always found differential terminated interfaces such as rs485
much more reliable than higher voltage single ended schemes.
Is your experience different?

john



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