Re: FPGA for PCI based servo control board

[Jason Cox <j_cox-at-idx.com.au>]

Hi all,
been watching the list for a while now and been thinking, Our biggest
problem is that the humble old PC is slowly changing to be what dictated
by Microsoft to be "standard" and we need a way for cheap control
interfaces for hobbyist like myself to work. The other problem is that
most of the users that need this are using stepper.o / freqmod.o to
drive hardware.

Now what i was thinking of was to build as John has said a fixed sized
packet that could be used with any hardware that is built to standard.
the packet would contain all drive data , CRC and time-stamp. The time
stamp is there so that the controller would have a buffer (FIFO) to
allow for any slight variation in delivery times. there would also be a
return packet with all return controls ( ESTOP, time-stamp error ,....).
All that EMC needs is to send data to the controller as long as it
dosn't get an error. if it gets an error it can set a query bit in the
TX packet to find out the time-stamp of the error and backtrack to that
point in the data stream. All packets also will be compressed so that
the packet size shrinks with the number axis that are in operation.

I am also working on a USB2.0 interface for this as the specs allow for
480 Mbits/sec TX rate.

If we also make this packet type interface work then it would be fairly
simple to make a kernel driver to point to and also allow for stats and
the like in the /proc

Granted this is one way of doing it in Linux but other OS's may be
problematic.

Jason Cox