Re: New project...PCI based servo control board

["Dave Engvall" <dengvall-at-charter.net>]

Hi again;
So the way to avoid the local bus wars is to go outside the PC with low
latency communications. This tack has been pretty well beat around in the
past with low-level message  passing over ethernet or firewire floating to
the top of the heap.
Just like the drivers for boards outside the stg realm it takes someone to
do a serious software effort and then test it.
Just my thoughts. Thanks.

Dave Engvall

----- Original Message -----
From: "Craig Edwards" <cedwards-at-ceinetworks.com>
To: "Multiple recipients of list" <emc-at-nist.gov>
Sent: Wednesday, March 26, 2003 4:37 PM
Subject: RE: New project...PCI based servo control board


>
> My understanding is that we will see PCI-Express (the new "marketing" name
> for 3GIO) based systems later this year, with broad adaptation not taking
> hold till 2004.  But as I understand it, most systems will still carry
> "standard" 3.3V PCI-X slots as well.  I agree that longer term (maybe as
> soon as 2 years....), PCI slots will become scarce and serial
interconnects
> will rule.  We can investigate PCI-Express a little further, but really I
> think it introduce a lot of variables into the project, not to mention
that
> most folks don't want or need to use a "new" PC for machine control.
> Actually, you can still find lots of ISA slots out there, and that was
> pronounced "dead" 3 or 4 years ago.
>
> I think one of the main issues is the software interface, and fortunately
I
> think the PCI-SIG group has addressed that pretty well by keeping the same
> programming interfaces.  Simplistically, you can think of PCI-Express as
> "just" serial PCI.  So what ever work gets done on this project should
> translate to the serial version pretty easily.  The following link is a
> position statement by the PCI-SIG that goes into more detail on these
> issues.
>
> http://www.pcisig.com/data/specifications/PCIExpress10FAQ.pdf
>
> But I'm open to more discussion on this topic, I agree that we should
> consider PCI-Express in our planning....:)
>
> -Craig
>
>
>
>
>
> High-Speed Buses: What is Beyond PCI?
>
>
> I recall a while back discussions of a PCI bus type board.. I wonder what
> has happened to that project..can someone enlighten us..The high price to
> produce the board might be one reason the project has not progressed????.
>
> The other reason why you should be carefull in developing a PCI bus
> controller is that the next generation of PC will not have a PCI bus on
the
> motherboard.
>
> Remember the EISA versus PCI versus VL-Bus wars? That battle ended with
PCI
> victorious.
>
> The current PCI bus is called the PCI-X standard.
> PCI-X is championed by three main players--Compaq, IBM, and HP.and , it
> offers two new higher speeds, 100 MHz and 133 MHz., PCI-X will allow eight
> 33 MHz slots, four 66 MHz slots, two 100 MHz slots, or a single 133 MHz
slot
> per controller.
>
> There are a plethora of players involved in replacing the PCI bus
>
> 1. InfiniBand, which stands for "infinite bandwidth", is one of the new
> technologies that is not a direct PCI replacement (as is often assumed),
but
> is one of the most ambitious and complex of the new interconnects. With
key
> backing from Intel, Dell, Hitachi, Sun Microsystems, Hewlett-Packard, IBM,
> and 3Com, InfiniBand is intended to be a specialized datacenter
> server-to-server and server-to-storage interconnect, though it feels more
> like a fully switched I/O networking architecture, than a traditional I/O
> bus.
>
> 2. A consortium called the Arapahoe Group, led by Intel, Compaq, HP and
> Microsoft, has recently proposed a new standard called 3GIO (Third
> Generation I/O) for now, which is meant to replace PCI as both an
expansion
> bus and chip-to-chip interconnect, and provide backward software
> compatibility with its PCI ancestor. The PCI-SIG will take over the
> management and promotion of 3GIO.
>
> 3. Two other high-performance, low latency buses, Motorola's RapidIO
> (originally announced by Motorola at the Embedded Systems Conference in
> Spring 2000) and AMD's HyperTransport, are aiming squarely at the
> communications and embedded market. AMD is also targeting chip-to-chip
> communications in the server and desktop market as well, and you may
already
> know HyperTransport is used in Nvidia's Nforce chipsets, and in the Xbox
as
> the interface between its NV2A and MCP chipset components (with an Intel
> processor right nearby.).
>
> As you would expect, the RapidIO Interconnect Architecture and Trade
> Association includes communications heavy hitters like Motorola, Cisco,
> Lucent, Nortel Networks, and Xilinx. The HyperTransport Consortium is a
mix
> of communications and system players, including AMD, Apple Computer, Cisco
> Systems, nVidia, API Networks, PCM Sierra, and Sun Microsystems.
>
> All these future interconnects and buses have a few things in common. They
> use packet-based, point-to-point connections; in fact, InfiniBand
implements
> a full switch fabric. They provide bandwidth in multiples of that offered
by
> PCI.
>
> Having two competing bus structures--three, if PCI itself continues to
> evolve--will put us back into the EISA/PCI/VL-Bus days of old.
>
> So consider the above before you commit to a PCI design.
>
> ps.. if you decide to proceed I will be glad to help...
> Alex Kovacic
> FISH Lab
> CYTOGENETICS UNIT,
> SEALS,Level 4, Campus Centre,
> Prince Of Wales Hospital,
> RANDWICK, NSW, 2031,
> AUSTRALIA,
> Tel: (61) (02) 9382 9168
> Fax: (61) (02) 9382 9157
> email1:A.Kovacic-at-unsw.edu.au
> email2:kovacica-at-sesahs.nsw.gov.au
>
>
>