Re: EMC compatible computers
- Subject: Re: EMC compatible computers
- From: "ERIC KELLER" <eekeller-at-psu.edu>
- Date: Tue, 14 Jan 2003 09:31:21 -0500 (EST)
- Content-Type: text/plain
There are packages for hardwired networking for real-time linux, most notably
under RTAI. You hook two cards directly together with a crossover cable.
On the other hand, I think Jon's stepper board is a bargain, is available now,
and will work with the most powerful PCs available. I guess we all like to
design new boards. I know I do, at least in theory.
Eric
On Tue, 14 Jan 2003 01:59:22, Jon Elson wrote:
>
>
>
> Dave Engvall wrote:
>
> >Jon,
> >Did I miss something. Isn't 10 Mb ethernet about as fast as the parallel
> >port?
> >
> >
> Yes, it does 1.25 MegaBytes/second, not counting protocol overhead,
> which can be quite substantial.
> The standard protocol requires gaps between messages and minimum packet
> sizes to prevent two
> different nodes from starting a message at the same time, having the
> messages pass through each
> other in the middle of the net, and both originators never realizing the
> message had been garbled
> on some nodes, because they heard their own outgoing message clearly at
> their location.
>
> Most twisted pair nets are much shorter, and isolated into separate
> segments by routers, so some
> of these restrictions may not have the same impact any more. If you
> were setting things up so
> that the CPU was the only 'master' node, and that the axis drives only
> responded to messages
> from the master, then you could dispense with all the time overhead of
> the CSMA/CD
> protocol. This of course would mean writing your own net driver as well!
>
> The IEEE-1284 protocol subset that I use doesn't incur all that
> overhead, and doesn't packetize
> messages. So, I do the absolute minimum of I/O to control the motors.
> First, there is an address
> transfer and a data write to latch the positions into the encoder
> counter holding registers. Then,
> there is one address transfer to select the encoder counters, and then 9
> byte read cycles to get the
> 24-bit positions for 3 axes. After the servo calculations, there is an
> address transfer and 6
> byte writes to load the SERVO DACs for 3 axes, or 12 byte writes for the
> step velocity
> counters. Then, one more addr transfer, and a data write to make the
> output changes take effect.
> So, that comes to 21 or 27 byte transfers for the complete servo cycle
> for 3 axes! There are other
> transfers to read and write digital I/O. All this takes place in 50 uS
> on a 333 MHz Pentium II,
> so you could run a 10 KHz servo update rate if you needed to. I have
> some doubt you could do
> it this fast on a 10 MB/s ethernet due to the protocol overhead.
>
> Note that my PPMC and universal stepper boards have NO CPU at all! So,
> when a command is
> sent, it is acted upon before the acknowledge gets back to the CPU.
>
> Jon
>
>
>
>
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