Re: Kulago/Mauch DRO ISA quadrature feedback kit

[Jon Elson <jmelson-at-artsci.wustl.edu>]

Matt Shaver wrote:

> > From: Doug Fortune <pentam-at-home.com>
> > Ok, I know there is a limit to how fast you can step a stepper (in rpm).
>
> It's more a problem of the granularity of the frequency control during
> accel/decel. The way the real time system works is that there's an 8254
> counter/timer chip inside every PC that can (is) programmed to generate an
> interrupt every so often. It's fed by a nearly 1.2MHz clock, and you can set
> it to interrupt the CPU at any multiple of those clock pulses by programming
> a register in the 8254 that counts down to 0, generates an interrupt, and
> then self reloads your value into the countdown register again. The value we
> program into that register we call PERIOD and the lower it is, the more
> frequent the interrupts. The maximum speed that the PC can process the
> interrupts (before another one occurs) is determined by:
>
> 2. Use special hardware to either increase the granularity of interrupt
> scheduling (this may be the Ahha method, I haven't reverse engineered their
> stuff), or to implement a programmable frequency generator controlled by the
> PC (the Flashcut method). The only drawbacks to these methods are (at the
> present time), cost and having to live with proprietary systems. Of these two
> methods, I like the programmable frequency generator best.

I intend to do this later this summer, as an extension to our parallel
port interfaced motion system.  What I have in mind is a FPGA which
has a fast digital counter running at, perhaps 1 MHz.  The CPU sends a
velocity command to this unit, which schedules step pulses with a
granularity of 1 uS, and counts those steps with an up/down counter.
The computer thinks it is driving a velocity servo system with a shaft
encoder, because it sends velocity commands, and gets back a position
count.  The CPU doesn't need to update this quickly, 1 KHz would be fine,
so the demand on the CPU is drastically reduced.

>From experience with the Xilinx Spartan-series chips, I can get 4 channels
of quadrature counter, plus some other interface logic on one $18 chip
(which needs a $6 serial PROM to load the configuration).  I suspect I can
get 2 channels of this stepper control logic on the same $18 chip.

With a granularity of 1 uS, we could reduce Matt's ~4% velocity step
(from 3617 to 3741 Hz) to about 0.4% with 1 uS steps.

Jon