Re: FPGA for PCI based servo control board



Ideally,
I would like to load everything to do with an outside world to an ISA
backplane machine.
There are other things to do besides running steppers / servos.
To do things properly, you need some number of I/Os for switches, input for
a spindle
tachometer for example, maybe additional A to D or D to A, place to stick
encoder
counter board in, things to control ATC and so on.
Reading to the lists, need for this functionality appears to be quite
urgent.
In this respect generation of stepper pulses is one of this tasks.
I really don't know much of FPGAs and what functionality you want to put
into
it, but my gut feeling tells me that its is not going to be cheap.
 In this case, why bother?
Jon already did it quite well.
I mean small add on board just for a step generation probably wouldn't be
that bad,
but I really not sure you will be able to do the rest of it economically.
Talking about that particular loop, I also looked through it about a month
ago,
and it appeared to be a main one for real time. So  the rest of the staff
can be made a part of it.
Why I like DOS? Because it runs very well, has tremendous software support
and its cheap
and requires very small CPU to do big things.
I'm not imposing my views onto anybody here but just reflecting my thoughts
on this subject.
This is basically the way I would do it if I wanted to do a functional and
very inexpensive CNC control
which could be sold by thousands of dollars.
Regards, Alex




----- Original Message -----
From: <jmkasunich-at-ra.rockwell.com>
To: Multiple recipients of list <emc-at-nist.gov>
Sent: Friday, April 04, 2003 3:26 PM
Subject: Re: FPGA for PCI based servo control board


>
>
>
>
> Alex wroteL
>
> > Jon, I would like very much knowing your opinion on a
> > subject of unloading real time loops to a small / cheap
> > networked PC.
> > Can it be done in DOS?
> > Can it be done it RTLinux in a sense if it will be
> > enough horsepower for 16 bit 386 machine to run
> > several loops simultaneously?
> >
> > This will solve networking issue since network doesn't
> > have to be in real time any more.
>
> Which real time tasks do you intend to unload?
>
> There are several, running at different speeds,
> and presenting different loads to the CPU.
> The ONLY real time task that presents a challenge
> to even a 100MHz Pentium is the step generation
> task.
>
> The FPGA project intends to move that task, and only
> that task, to hardware.
>
> Moving step generation to a slower 386 CPU will make
> things worse, not better.
>
> Moving the other real-time tasks to a different CPU
> is fixing a problem that doesn't exist.
>
> I really gotta get that block diagram posted.
>
> John Kasunich
>
>
>
>
>
>





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