Re: FPGA for PCI based servo control board



On Tue, Apr 01, 2003 at 09:26:19AM -0500, jmkasunich-at-ra.rockwell.com wrote:
> 
> 
> 
> 
> John Sheahan wrote:
> 
> 
> 
> > On Tue, Apr 01, 2003 at 01:52:57AM -0500, Jon Elson wrote:
> >>
> >> That is NOT true 5 V I/O.  It is 5V TOLERANT I/O.
> >> If you want to pull up above 3 V, you need low-value
> >> pull-up resistors external to the chip.  If you
> >> need really fast positive-going transitions to +5 V,
> >> you can't get them.
> >
> >
> > true - but 5v pci only needs to be 5v tolerant.
> > driving 3v3 is in specification.
> >
> > is there much 5v PCI any more?
> >
> 
> Repeat after me:
> "The world is not a PC"
> "The world is not a PC"

please reread my comment, note the word 'PCI'.
I have read and understood the VI curves in the PCI version 2.2 
specification.  The comment you were responding to was PCI related.

> 
> Just because you don't need 5V to talk to a PCI bus inside
> a PC doesn't mean you don't need 5V.  The outputs of the
> FPGA will have to drive opto-couplers, relay drivers, analog
> filters, OPTO-22 modules, solid state relays, and all kinds
> of other real world stuff.  For that stuff, 5V is FAR better
> than 3.3V, and don't even mention 2.5V.
> 

Sure. I do this regularly. 
I have done this since TTL days. check out the ttl output specs 
one day. they are pretty similar to 3v3 output stages.
apart from the 5v tolerant input part.
I tend to drive optos with active low outputs anyway. Your point is??



> On a positive note, I believe that you could use HCT series
> buffer chips running on 5V, feed them a signal from a 3.3V
> FPGA, and get a good 5V signal on the buffer outputs.  Could
> get bulky if you have lots of output pins to buffer.

that is the way most of the world does it, yes.
HCT is still in full production at places like Phillips.
john


> 
> John Kasunich
> 
> 
> 
> 



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