RE: Quadrature Counting

["Patrick Mendiuk" <pmendiuk-at-attbi.com>]

Quadrature decoding is quite straight forward.  

--
--  File: quad_dec.vhd
--  created by PWM 07/29/01 23:28:05
--

library IEEE;
use IEEE.std_logic_1164.all;

entity quad_dec is
	port (
		clk	: in 	STD_LOGIC;
		rst	: in 	STD_LOGIC;
		qa	: in 	STD_LOGIC;
		qb	: in 	STD_LOGIC;
		dir	: out 	STD_LOGIC;
		en	: out 	STD_LOGIC
	);
end quad_dec;

architecture quad_dec of quad_dec is
constant reset_active 		: std_logic := '1';
signal qa_d, qb_d 		: std_logic;
signal cnt_i 			: std_logic;

begin
process(rst, clk)
begin
	if rst = reset_active then
		en 	<= '0';
		dir 	<= '0';
		qa_d 	<= '0';
		qb_d 	<= '0';
		cnt_i	<= '0';
	elsif rising_edge(clk) then
		if qa = '1' then	-- sync quadrature inputs with system clk
			qa_d <= '1';
		else
			qa_d <= '0';
		end if;
		if qb = '1' then
			qb_d <= '1';
		else
			qb_d <= '0';
		end if;
		-- counting up
		if 	(qa = '1' and qa_d = '0' and qb = '0' and qb_d = '0') or
			(qa = '1' and qa_d = '1' and qb = '1' and qb_d = '0') or
			(qa = '0' and qa_d = '1' and qb = '1' and qb_d = '1') or
			(qa = '0' and qa_d = '0' and qb = '0' and qb_d = '1') then
			cnt_i <= '1';
			dir <= '1';
		-- counting down
		elsif
			(qa = '0' and qa_d = '0' and qb = '1' and qb_d = '0') or
			(qa = '1' and qa_d = '0' and qb = '1' and qb_d = '1') or
			(qa = '1' and qa_d = '1' and qb = '0' and qb_d = '1') or
			(qa = '0' and qa_d = '1' and qb = '0' and qb_d = '0') then

			cnt_i <= '1';
			dir <= '0';
		else
			cnt_i <= '0';
		end if;
		en <= cnt_i; -- delay count output by one clock
	end if;
end process;




end quad_dec;