Re: emc-fpga.txt



krb

I personally am very interested in a board for $50-150.  $888 Servo-to-go
is simply too much for me.  So yes I am interested and wonder why you
couldn't duplicate the STG11 i/o exactly, then it would fit without any
code changes.

And I would like to see what you have so far too.

charly    





At 05:48 PM 5/17/01 -0400, you wrote:
>
>Hello All.
>
>I am working on a prototype board that may be of interest
>to EMC users.  It is an ISA WW based on a Xilinx 4005XL
>FPGA at 50 MHz, running four 12-bit delta-sigma DACs to
>+/- 10 volts and four quadrature encoder inputs.  The
>only controller is a Pentium II 233MHz dual booting RHLinux
>6.2 and DOS 6.22.
>
>Since an FPGA is in-system-programmable, the internal
>'electronics' can be as easily changed as the software.
>It is currently I/O mapped to 0x300 .. 0x31F, 16-bit only
>access with control/status junk in the first 16 bytes
>and 16-bit encoder/dac pairs the remainder.
>(yes, memory mapping would be faster... ISA yuck)
>It generates a heartbeat irq 7 every millisecond.
>
>My cost for the FPGA was $27; better ones are available
>for $15 with 20k+ gates -at-120MHz, but not wire-wrappable (pfqp).
>I estimate an ISA board with such a system would have
>a parts cost of under $50; so maybe $150 assembled&tested.
>
>My question for the EMC experts is:
>1.  How difficult would it be to modify the EMC internals
>to support such a system as described above.
>Would it be BDI-able?
>2.  Would EMC be able to make any use of the FPGA-specific
>additional abilities - such as direct velocity measurement,
>sub-quarter count encoder interpolation and the direct
>numeric interpolation of splines?
>
>Good day.  --krb
>
>
>
>
>
>
>




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